An array substrate of a display device comprises a base substrate, a plurality of gate lines and a plurality of data lines disposed on the base substrate as intersecting each other to define a plurality of pixel regions, and electrodes disposed in the respective pixel regions. As illustrated in FIG. 1, two gate lines P10 and three data lines P20 intersect each other to define two pixel regions, and an electrode P30 is disposed in each of the pixel regions. With reference to an example of the electrode P30 being a pixel electrode, a cross section view along a direction AA′ of the array substrate of FIG. 1 is illustrated in FIG. 2, in which two adjacent electrodes P30 are located in the same layer and with a distance d there-between.
Currently, resolutions of array substrates have reached 300 pixels per inch (ppi), 400 ppi, 500 ppi or even higher from 200 ppi. With the increase of the resolution, the size of an individual pixel region of high resolution array substrates will be decreased. Taking a 400 ppi array substrate as an example, a width of each pixel region along a direction parallel to the gate lines is only 21 micrometers. With the decreasing of the size of the pixel regions, the distance between adjacent electrodes (i.e., d of FIGS. 1 and 2) is getting smaller and smaller, such that a regular aperture ratio of the pixel regions may be maintained. As a result, when a display device comprising such an array substrate is being driven, electric fields respectively generated by adjacent electrodes will interfere with each other, which will render disordered rotations of liquid crystals of the display device, thereby causing light leakage and color-mixing to the display device and compromising the display quality of the display device.